Xenomai 3.3.2
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e1000.h
1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2011 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29/* Linux PRO/1000 Ethernet Driver main header file */
30
31#ifndef _E1000_H_
32#define _E1000_H_
33
34#include <linux/bitops.h>
35#include <linux/types.h>
36#include <linux/timer.h>
37#include <linux/workqueue.h>
38#include <linux/io.h>
39#include <linux/netdevice.h>
40#include <linux/pci.h>
41#include <linux/crc32.h>
42#include <linux/if_vlan.h>
43#include <linux/ethtool.h>
44
45#include <rtnet_port.h>
46
47#include "hw.h"
48
49struct e1000_info;
50
51#define e_dbg(format, arg...) \
52 pr_debug(format, ## arg)
53#define e_err(format, arg...) \
54 pr_err(format, ## arg)
55#define e_info(format, arg...) \
56 pr_info(format, ## arg)
57#define e_warn(format, arg...) \
58 pr_warn(format, ## arg)
59#define e_notice(format, arg...) \
60 pr_notice(format, ## arg)
61
62
63/* Interrupt modes, as used by the IntMode parameter */
64#define E1000E_INT_MODE_LEGACY 0
65#define E1000E_INT_MODE_MSI 1
66#define E1000E_INT_MODE_MSIX 2
67
68/* Tx/Rx descriptor defines */
69#define E1000_DEFAULT_TXD 256
70#define E1000_MAX_TXD 4096
71#define E1000_MIN_TXD 64
72
73#define E1000_DEFAULT_RXD 256
74#define E1000_MAX_RXD 4096
75#define E1000_MIN_RXD 64
76
77#define E1000_MIN_ITR_USECS 10 /* 100000 irq/sec */
78#define E1000_MAX_ITR_USECS 10000 /* 100 irq/sec */
79
80/* Early Receive defines */
81#define E1000_ERT_2048 0x100
82
83#define E1000_FC_PAUSE_TIME 0x0680 /* 858 usec */
84
85/* How many Tx Descriptors do we need to call netif_wake_queue ? */
86/* How many Rx Buffers do we bundle into one write to the hardware ? */
87#define E1000_RX_BUFFER_WRITE 16 /* Must be power of 2 */
88
89#define AUTO_ALL_MODES 0
90#define E1000_EEPROM_APME 0x0400
91
92#define E1000_MNG_VLAN_NONE (-1)
93
94/* Number of packet split data buffers (not including the header buffer) */
95#define PS_PAGE_BUFFERS (MAX_PS_BUFFERS - 1)
96
97#define DEFAULT_JUMBO 9234
98
99/* BM/HV Specific Registers */
100#define BM_PORT_CTRL_PAGE 769
101
102#define PHY_UPPER_SHIFT 21
103#define BM_PHY_REG(page, reg) \
104 (((reg) & MAX_PHY_REG_ADDRESS) |\
105 (((page) & 0xFFFF) << PHY_PAGE_SHIFT) |\
106 (((reg) & ~MAX_PHY_REG_ADDRESS) << (PHY_UPPER_SHIFT - PHY_PAGE_SHIFT)))
107
108/* PHY Wakeup Registers and defines */
109#define BM_PORT_GEN_CFG PHY_REG(BM_PORT_CTRL_PAGE, 17)
110#define BM_RCTL PHY_REG(BM_WUC_PAGE, 0)
111#define BM_WUC PHY_REG(BM_WUC_PAGE, 1)
112#define BM_WUFC PHY_REG(BM_WUC_PAGE, 2)
113#define BM_WUS PHY_REG(BM_WUC_PAGE, 3)
114#define BM_RAR_L(_i) (BM_PHY_REG(BM_WUC_PAGE, 16 + ((_i) << 2)))
115#define BM_RAR_M(_i) (BM_PHY_REG(BM_WUC_PAGE, 17 + ((_i) << 2)))
116#define BM_RAR_H(_i) (BM_PHY_REG(BM_WUC_PAGE, 18 + ((_i) << 2)))
117#define BM_RAR_CTRL(_i) (BM_PHY_REG(BM_WUC_PAGE, 19 + ((_i) << 2)))
118#define BM_MTA(_i) (BM_PHY_REG(BM_WUC_PAGE, 128 + ((_i) << 1)))
119
120#define BM_RCTL_UPE 0x0001 /* Unicast Promiscuous Mode */
121#define BM_RCTL_MPE 0x0002 /* Multicast Promiscuous Mode */
122#define BM_RCTL_MO_SHIFT 3 /* Multicast Offset Shift */
123#define BM_RCTL_MO_MASK (3 << 3) /* Multicast Offset Mask */
124#define BM_RCTL_BAM 0x0020 /* Broadcast Accept Mode */
125#define BM_RCTL_PMCF 0x0040 /* Pass MAC Control Frames */
126#define BM_RCTL_RFCE 0x0080 /* Rx Flow Control Enable */
127
128#define HV_STATS_PAGE 778
129#define HV_SCC_UPPER PHY_REG(HV_STATS_PAGE, 16) /* Single Collision Count */
130#define HV_SCC_LOWER PHY_REG(HV_STATS_PAGE, 17)
131#define HV_ECOL_UPPER PHY_REG(HV_STATS_PAGE, 18) /* Excessive Coll. Count */
132#define HV_ECOL_LOWER PHY_REG(HV_STATS_PAGE, 19)
133#define HV_MCC_UPPER PHY_REG(HV_STATS_PAGE, 20) /* Multiple Coll. Count */
134#define HV_MCC_LOWER PHY_REG(HV_STATS_PAGE, 21)
135#define HV_LATECOL_UPPER PHY_REG(HV_STATS_PAGE, 23) /* Late Collision Count */
136#define HV_LATECOL_LOWER PHY_REG(HV_STATS_PAGE, 24)
137#define HV_COLC_UPPER PHY_REG(HV_STATS_PAGE, 25) /* Collision Count */
138#define HV_COLC_LOWER PHY_REG(HV_STATS_PAGE, 26)
139#define HV_DC_UPPER PHY_REG(HV_STATS_PAGE, 27) /* Defer Count */
140#define HV_DC_LOWER PHY_REG(HV_STATS_PAGE, 28)
141#define HV_TNCRS_UPPER PHY_REG(HV_STATS_PAGE, 29) /* Transmit with no CRS */
142#define HV_TNCRS_LOWER PHY_REG(HV_STATS_PAGE, 30)
143
144#define E1000_FCRTV_PCH 0x05F40 /* PCH Flow Control Refresh Timer Value */
145
146/* BM PHY Copper Specific Status */
147#define BM_CS_STATUS 17
148#define BM_CS_STATUS_LINK_UP 0x0400
149#define BM_CS_STATUS_RESOLVED 0x0800
150#define BM_CS_STATUS_SPEED_MASK 0xC000
151#define BM_CS_STATUS_SPEED_1000 0x8000
152
153/* 82577 Mobile Phy Status Register */
154#define HV_M_STATUS 26
155#define HV_M_STATUS_AUTONEG_COMPLETE 0x1000
156#define HV_M_STATUS_SPEED_MASK 0x0300
157#define HV_M_STATUS_SPEED_1000 0x0200
158#define HV_M_STATUS_LINK_UP 0x0040
159
160#define E1000_ICH_FWSM_PCIM2PCI 0x01000000 /* ME PCIm-to-PCI active */
161#define E1000_ICH_FWSM_PCIM2PCI_COUNT 2000
162
163/* Time to wait before putting the device into D3 if there's no link (in ms). */
164#define LINK_TIMEOUT 100
165
166#define DEFAULT_RDTR 0
167#define DEFAULT_RADV 8
168#define BURST_RDTR 0x20
169#define BURST_RADV 0x20
170
171/*
172 * in the case of WTHRESH, it appears at least the 82571/2 hardware
173 * writes back 4 descriptors when WTHRESH=5, and 3 descriptors when
174 * WTHRESH=4, and since we want 64 bytes at a time written back, set
175 * it to 5
176 */
177#define E1000_TXDCTL_DMA_BURST_ENABLE \
178 (E1000_TXDCTL_GRAN | /* set descriptor granularity */ \
179 E1000_TXDCTL_COUNT_DESC | \
180 (5 << 16) | /* wthresh must be +1 more than desired */\
181 (1 << 8) | /* hthresh */ \
182 0x1f) /* pthresh */
183
184#define E1000_RXDCTL_DMA_BURST_ENABLE \
185 (0x01000000 | /* set descriptor granularity */ \
186 (4 << 16) | /* set writeback threshold */ \
187 (4 << 8) | /* set prefetch threshold */ \
188 0x20) /* set hthresh */
189
190#define E1000_TIDV_FPD (1 << 31)
191#define E1000_RDTR_FPD (1 << 31)
192
193enum e1000_boards {
194 board_82571,
195 board_82572,
196 board_82573,
197 board_82574,
198 board_82583,
199 board_80003es2lan,
200 board_ich8lan,
201 board_ich9lan,
202 board_ich10lan,
203 board_pchlan,
204 board_pch2lan,
205 board_pch_lpt,
206};
207
208struct e1000_ps_page {
209 struct page *page;
210 u64 dma; /* must be u64 - written to hw */
211};
212
213/*
214 * wrappers around a pointer to a socket buffer,
215 * so a DMA handle can be stored along with the buffer
216 */
217struct e1000_buffer {
218 dma_addr_t dma;
219 struct rtskb *skb;
220 union {
221 /* Tx */
222 struct {
223 unsigned long time_stamp;
224 u16 length;
225 u16 next_to_watch;
226 unsigned int segs;
227 unsigned int bytecount;
228 u16 mapped_as_page;
229 };
230 /* Rx */
231 struct {
232 /* arrays of page information for packet split */
233 struct e1000_ps_page *ps_pages;
234 struct page *page;
235 };
236 };
237};
238
239struct e1000_ring {
240 void *desc; /* pointer to ring memory */
241 dma_addr_t dma; /* phys address of ring */
242 unsigned int size; /* length of ring in bytes */
243 unsigned int count; /* number of desc. in ring */
244
245 u16 next_to_use;
246 u16 next_to_clean;
247
248 u16 head;
249 u16 tail;
250
251 /* array of buffer information structs */
252 struct e1000_buffer *buffer_info;
253
254 char name[IFNAMSIZ + 5];
255 u32 ims_val;
256 u32 itr_val;
257 u16 itr_register;
258 int set_itr;
259
260 struct rtskb *rx_skb_top;
261
262 rtdm_lock_t lock;
263};
264
265/* PHY register snapshot values */
266struct e1000_phy_regs {
267 u16 bmcr; /* basic mode control register */
268 u16 bmsr; /* basic mode status register */
269 u16 advertise; /* auto-negotiation advertisement */
270 u16 lpa; /* link partner ability register */
271 u16 expansion; /* auto-negotiation expansion reg */
272 u16 ctrl1000; /* 1000BASE-T control register */
273 u16 stat1000; /* 1000BASE-T status register */
274 u16 estatus; /* extended status register */
275};
276
277/* board specific private data structure */
278struct e1000_adapter {
279 struct timer_list watchdog_timer;
280 struct timer_list phy_info_timer;
281 struct timer_list blink_timer;
282
283 struct work_struct reset_task;
284 struct work_struct watchdog_task;
285
286 const struct e1000_info *ei;
287
288 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
289 u32 bd_number;
290 u32 rx_buffer_len;
291 u16 mng_vlan_id;
292 u16 link_speed;
293 u16 link_duplex;
294 u16 eeprom_vers;
295
296 /* track device up/down/testing state */
297 unsigned long state;
298
299 /* Interrupt Throttle Rate */
300 u32 itr;
301 u32 itr_setting;
302 u16 tx_itr;
303 u16 rx_itr;
304
305 /*
306 * Tx
307 */
308 struct e1000_ring *tx_ring /* One per active queue */
309 ____cacheline_aligned_in_smp;
310
311 struct napi_struct napi;
312
313 unsigned int restart_queue;
314 u32 txd_cmd;
315
316 bool detect_tx_hung;
317 u8 tx_timeout_factor;
318
319 u32 tx_int_delay;
320 u32 tx_abs_int_delay;
321
322 unsigned int total_tx_bytes;
323 unsigned int total_tx_packets;
324 unsigned int total_rx_bytes;
325 unsigned int total_rx_packets;
326
327 /* Tx stats */
328 u64 tpt_old;
329 u64 colc_old;
330 u32 gotc;
331 u64 gotc_old;
332 u32 tx_timeout_count;
333 u32 tx_fifo_head;
334 u32 tx_head_addr;
335 u32 tx_fifo_size;
336 u32 tx_dma_failed;
337
338 /*
339 * Rx
340 */
341 bool (*clean_rx) (struct e1000_adapter *adapter,
342 nanosecs_abs_t *time_stamp)
343 ____cacheline_aligned_in_smp;
344 void (*alloc_rx_buf) (struct e1000_adapter *adapter,
345 int cleaned_count, gfp_t gfp);
346 struct e1000_ring *rx_ring;
347
348 u32 rx_int_delay;
349 u32 rx_abs_int_delay;
350
351 /* Rx stats */
352 u64 hw_csum_err;
353 u64 hw_csum_good;
354 u64 rx_hdr_split;
355 u32 gorc;
356 u64 gorc_old;
357 u32 alloc_rx_buff_failed;
358 u32 rx_dma_failed;
359
360 unsigned int rx_ps_pages;
361 u16 rx_ps_bsize0;
362 u32 max_frame_size;
363 u32 min_frame_size;
364
365 /* OS defined structs */
366 struct rtnet_device *netdev;
367 struct pci_dev *pdev;
368
369 rtdm_irq_t irq_handle;
370 rtdm_irq_t rx_irq_handle;
371 rtdm_irq_t tx_irq_handle;
372 rtdm_nrtsig_t mod_timer_sig;
373 rtdm_nrtsig_t downshift_sig;
374
375 /* structs defined in e1000_hw.h */
376 struct e1000_hw hw;
377
378 spinlock_t stats64_lock;
379 struct e1000_hw_stats stats;
380 struct e1000_phy_info phy_info;
381 struct e1000_phy_stats phy_stats;
382
383 /* Snapshot of PHY registers */
384 struct e1000_phy_regs phy_regs;
385
386 struct e1000_ring test_tx_ring;
387 struct e1000_ring test_rx_ring;
388 u32 test_icr;
389
390 u32 msg_enable;
391 unsigned int num_vectors;
392 struct msix_entry *msix_entries;
393 int int_mode;
394 u32 eiac_mask;
395
396 u32 eeprom_wol;
397 u32 wol;
398 u32 pba;
399 u32 max_hw_frame_size;
400
401 bool fc_autoneg;
402
403 unsigned int flags;
404 unsigned int flags2;
405 struct work_struct downshift_task;
406 struct work_struct update_phy_task;
407 struct work_struct print_hang_task;
408
409 bool idle_check;
410 int phy_hang_count;
411};
412
413struct e1000_info {
414 enum e1000_mac_type mac;
415 unsigned int flags;
416 unsigned int flags2;
417 u32 pba;
418 u32 max_hw_frame_size;
419 s32 (*get_variants)(struct e1000_adapter *);
420 const struct e1000_mac_operations *mac_ops;
421 const struct e1000_phy_operations *phy_ops;
422 const struct e1000_nvm_operations *nvm_ops;
423};
424
425/* hardware capability, feature, and workaround flags */
426#define FLAG_HAS_AMT (1 << 0)
427#define FLAG_HAS_FLASH (1 << 1)
428#define FLAG_HAS_HW_VLAN_FILTER (1 << 2)
429#define FLAG_HAS_WOL (1 << 3)
430#define FLAG_HAS_ERT (1 << 4)
431#define FLAG_HAS_CTRLEXT_ON_LOAD (1 << 5)
432#define FLAG_HAS_SWSM_ON_LOAD (1 << 6)
433#define FLAG_HAS_JUMBO_FRAMES (1 << 7)
434#define FLAG_READ_ONLY_NVM (1 << 8)
435#define FLAG_IS_ICH (1 << 9)
436#define FLAG_HAS_MSIX (1 << 10)
437#define FLAG_HAS_SMART_POWER_DOWN (1 << 11)
438#define FLAG_IS_QUAD_PORT_A (1 << 12)
439#define FLAG_IS_QUAD_PORT (1 << 13)
440#define FLAG_TIPG_MEDIUM_FOR_80003ESLAN (1 << 14)
441#define FLAG_APME_IN_WUC (1 << 15)
442#define FLAG_APME_IN_CTRL3 (1 << 16)
443#define FLAG_APME_CHECK_PORT_B (1 << 17)
444#define FLAG_DISABLE_FC_PAUSE_TIME (1 << 18)
445#define FLAG_NO_WAKE_UCAST (1 << 19)
446#define FLAG_MNG_PT_ENABLED (1 << 20)
447#define FLAG_RESET_OVERWRITES_LAA (1 << 21)
448#define FLAG_TARC_SPEED_MODE_BIT (1 << 22)
449#define FLAG_TARC_SET_BIT_ZERO (1 << 23)
450#define FLAG_RX_NEEDS_RESTART (1 << 24)
451#define FLAG_LSC_GIG_SPEED_DROP (1 << 25)
452#define FLAG_SMART_POWER_DOWN (1 << 26)
453#define FLAG_MSI_ENABLED (1 << 27)
454/* reserved (1 << 28) */
455#define FLAG_TSO_FORCE (1 << 29)
456#define FLAG_RX_RESTART_NOW (1 << 30)
457#define FLAG_MSI_TEST_FAILED (1 << 31)
458
459#define FLAG2_CRC_STRIPPING (1 << 0)
460#define FLAG2_HAS_PHY_WAKEUP (1 << 1)
461#define FLAG2_IS_DISCARDING (1 << 2)
462#define FLAG2_DISABLE_ASPM_L1 (1 << 3)
463#define FLAG2_HAS_PHY_STATS (1 << 4)
464#define FLAG2_HAS_EEE (1 << 5)
465#define FLAG2_DMA_BURST (1 << 6)
466#define FLAG2_DISABLE_ASPM_L0S (1 << 7)
467#define FLAG2_DISABLE_AIM (1 << 8)
468#define FLAG2_CHECK_PHY_HANG (1 << 9)
469#define FLAG2_NO_DISABLE_RX (1 << 10)
470#define FLAG2_PCIM2PCI_ARBITER_WA (1 << 11)
471
472#define E1000_RX_DESC_PS(R, i) \
473 (&(((union e1000_rx_desc_packet_split *)((R).desc))[i]))
474#define E1000_RX_DESC_EXT(R, i) \
475 (&(((union e1000_rx_desc_extended *)((R).desc))[i]))
476#define E1000_GET_DESC(R, i, type) (&(((struct type *)((R).desc))[i]))
477#define E1000_TX_DESC(R, i) E1000_GET_DESC(R, i, e1000_tx_desc)
478#define E1000_CONTEXT_DESC(R, i) E1000_GET_DESC(R, i, e1000_context_desc)
479
480enum e1000_state_t {
481 __E1000_TESTING,
482 __E1000_RESETTING,
483 __E1000_ACCESS_SHARED_RESOURCE,
484 __E1000_DOWN
485};
486
487enum latency_range {
488 lowest_latency = 0,
489 low_latency = 1,
490 bulk_latency = 2,
491 latency_invalid = 255
492};
493
494extern char e1000e_driver_name[];
495extern const char e1000e_driver_version[];
496
497extern void e1000e_check_options(struct e1000_adapter *adapter);
498extern void e1000e_set_ethtool_ops(struct net_device *netdev);
499
500extern int e1000e_up(struct e1000_adapter *adapter);
501extern void e1000e_down(struct e1000_adapter *adapter);
502extern void e1000e_reinit_locked(struct e1000_adapter *adapter);
503extern void e1000e_reset(struct e1000_adapter *adapter);
504extern void e1000e_power_up_phy(struct e1000_adapter *adapter);
505extern int e1000e_setup_rx_resources(struct e1000_adapter *adapter);
506extern int e1000e_setup_tx_resources(struct e1000_adapter *adapter);
507extern void e1000e_free_rx_resources(struct e1000_adapter *adapter);
508extern void e1000e_free_tx_resources(struct e1000_adapter *adapter);
509extern struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev,
510 struct rtnl_link_stats64
511 *stats);
512extern void e1000e_set_interrupt_capability(struct e1000_adapter *adapter);
513extern void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter);
514extern void e1000e_get_hw_control(struct e1000_adapter *adapter);
515extern void e1000e_release_hw_control(struct e1000_adapter *adapter);
516
517extern unsigned int copybreak;
518
519extern char *e1000e_get_hw_dev_name(struct e1000_hw *hw);
520
521extern const struct e1000_info e1000_82571_info;
522extern const struct e1000_info e1000_82572_info;
523extern const struct e1000_info e1000_82573_info;
524extern const struct e1000_info e1000_82574_info;
525extern const struct e1000_info e1000_82583_info;
526extern const struct e1000_info e1000_ich8_info;
527extern const struct e1000_info e1000_ich9_info;
528extern const struct e1000_info e1000_ich10_info;
529extern const struct e1000_info e1000_pch_info;
530extern const struct e1000_info e1000_pch2_info;
531extern const struct e1000_info e1000_pch_lpt_info;
532extern const struct e1000_info e1000_es2_info;
533
534extern s32 e1000_read_pba_string_generic(struct e1000_hw *hw, u8 *pba_num,
535 u32 pba_num_size);
536
537extern s32 e1000e_commit_phy(struct e1000_hw *hw);
538
539extern bool e1000e_enable_mng_pass_thru(struct e1000_hw *hw);
540
541extern bool e1000e_get_laa_state_82571(struct e1000_hw *hw);
542extern void e1000e_set_laa_state_82571(struct e1000_hw *hw, bool state);
543
544extern void e1000e_write_protect_nvm_ich8lan(struct e1000_hw *hw);
545extern void e1000e_set_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw,
546 bool state);
547extern void e1000e_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw *hw);
548extern void e1000e_gig_downshift_workaround_ich8lan(struct e1000_hw *hw);
549extern void e1000_suspend_workarounds_ich8lan(struct e1000_hw *hw);
550extern void e1000_resume_workarounds_pchlan(struct e1000_hw *hw);
551extern s32 e1000_configure_k1_ich8lan(struct e1000_hw *hw, bool k1_enable);
552extern s32 e1000_lv_jumbo_workaround_ich8lan(struct e1000_hw *hw, bool enable);
553extern void e1000_copy_rx_addrs_to_phy_ich8lan(struct e1000_hw *hw);
554
555extern s32 e1000e_check_for_copper_link(struct e1000_hw *hw);
556extern s32 e1000e_check_for_fiber_link(struct e1000_hw *hw);
557extern s32 e1000e_check_for_serdes_link(struct e1000_hw *hw);
558extern s32 e1000e_setup_led_generic(struct e1000_hw *hw);
559extern s32 e1000e_cleanup_led_generic(struct e1000_hw *hw);
560extern s32 e1000e_led_on_generic(struct e1000_hw *hw);
561extern s32 e1000e_led_off_generic(struct e1000_hw *hw);
562extern s32 e1000e_get_bus_info_pcie(struct e1000_hw *hw);
563extern void e1000_set_lan_id_multi_port_pcie(struct e1000_hw *hw);
564extern void e1000_set_lan_id_single_port(struct e1000_hw *hw);
565extern s32 e1000e_get_speed_and_duplex_copper(struct e1000_hw *hw, u16 *speed, u16 *duplex);
566extern s32 e1000e_get_speed_and_duplex_fiber_serdes(struct e1000_hw *hw, u16 *speed, u16 *duplex);
567extern s32 e1000e_disable_pcie_master(struct e1000_hw *hw);
568extern s32 e1000e_get_auto_rd_done(struct e1000_hw *hw);
569extern s32 e1000e_id_led_init(struct e1000_hw *hw);
570extern void e1000e_clear_hw_cntrs_base(struct e1000_hw *hw);
571extern s32 e1000e_setup_fiber_serdes_link(struct e1000_hw *hw);
572extern s32 e1000e_copper_link_setup_m88(struct e1000_hw *hw);
573extern s32 e1000e_copper_link_setup_igp(struct e1000_hw *hw);
574extern s32 e1000e_setup_link(struct e1000_hw *hw);
575extern void e1000_clear_vfta_generic(struct e1000_hw *hw);
576extern void e1000e_init_rx_addrs(struct e1000_hw *hw, u16 rar_count);
577extern void e1000e_update_mc_addr_list_generic(struct e1000_hw *hw,
578 u8 *mc_addr_list,
579 u32 mc_addr_count);
580extern void e1000e_rar_set(struct e1000_hw *hw, u8 *addr, u32 index);
581extern s32 e1000e_set_fc_watermarks(struct e1000_hw *hw);
582extern void e1000e_set_pcie_no_snoop(struct e1000_hw *hw, u32 no_snoop);
583extern s32 e1000e_get_hw_semaphore(struct e1000_hw *hw);
584extern s32 e1000e_valid_led_default(struct e1000_hw *hw, u16 *data);
585extern void e1000e_config_collision_dist(struct e1000_hw *hw);
586extern s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw);
587extern s32 e1000e_force_mac_fc(struct e1000_hw *hw);
588extern s32 e1000e_blink_led_generic(struct e1000_hw *hw);
589extern void e1000_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value);
590extern s32 e1000_check_alt_mac_addr_generic(struct e1000_hw *hw);
591extern void e1000e_reset_adaptive(struct e1000_hw *hw);
592extern void e1000e_update_adaptive(struct e1000_hw *hw);
593
594extern s32 e1000e_setup_copper_link(struct e1000_hw *hw);
595extern s32 e1000e_get_phy_id(struct e1000_hw *hw);
596extern void e1000e_put_hw_semaphore(struct e1000_hw *hw);
597extern s32 e1000e_check_reset_block_generic(struct e1000_hw *hw);
598extern s32 e1000e_phy_force_speed_duplex_igp(struct e1000_hw *hw);
599extern s32 e1000e_get_cable_length_igp_2(struct e1000_hw *hw);
600extern s32 e1000e_get_phy_info_igp(struct e1000_hw *hw);
601extern s32 e1000_set_page_igp(struct e1000_hw *hw, u16 page);
602extern s32 e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data);
603extern s32 e1000e_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset,
604 u16 *data);
605extern s32 e1000e_phy_hw_reset_generic(struct e1000_hw *hw);
606extern s32 e1000e_set_d3_lplu_state(struct e1000_hw *hw, bool active);
607extern s32 e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data);
608extern s32 e1000e_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset,
609 u16 data);
610extern s32 e1000e_phy_sw_reset(struct e1000_hw *hw);
611extern s32 e1000e_phy_force_speed_duplex_m88(struct e1000_hw *hw);
612extern s32 e1000e_get_cfg_done(struct e1000_hw *hw);
613extern s32 e1000e_get_cable_length_m88(struct e1000_hw *hw);
614extern s32 e1000e_get_phy_info_m88(struct e1000_hw *hw);
615extern s32 e1000e_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data);
616extern s32 e1000e_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data);
617extern s32 e1000e_phy_init_script_igp3(struct e1000_hw *hw);
618extern enum e1000_phy_type e1000e_get_phy_type_from_id(u32 phy_id);
619extern s32 e1000e_determine_phy_address(struct e1000_hw *hw);
620extern s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data);
621extern s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data);
622extern s32 e1000_enable_phy_wakeup_reg_access_bm(struct e1000_hw *hw,
623 u16 *phy_reg);
624extern s32 e1000_disable_phy_wakeup_reg_access_bm(struct e1000_hw *hw,
625 u16 *phy_reg);
626extern s32 e1000e_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data);
627extern s32 e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data);
628extern void e1000e_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl);
629extern s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data);
630extern s32 e1000e_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset,
631 u16 data);
632extern s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data);
633extern s32 e1000e_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset,
634 u16 *data);
635extern s32 e1000e_phy_has_link_generic(struct e1000_hw *hw, u32 iterations,
636 u32 usec_interval, bool *success);
637extern s32 e1000e_phy_reset_dsp(struct e1000_hw *hw);
638extern void e1000_power_up_phy_copper(struct e1000_hw *hw);
639extern void e1000_power_down_phy_copper(struct e1000_hw *hw);
640extern s32 e1000e_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data);
641extern s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data);
642extern s32 e1000e_check_downshift(struct e1000_hw *hw);
643extern s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data);
644extern s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset,
645 u16 *data);
646extern s32 e1000_read_phy_reg_page_hv(struct e1000_hw *hw, u32 offset,
647 u16 *data);
648extern s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data);
649extern s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset,
650 u16 data);
651extern s32 e1000_write_phy_reg_page_hv(struct e1000_hw *hw, u32 offset,
652 u16 data);
653extern s32 e1000_link_stall_workaround_hv(struct e1000_hw *hw);
654extern s32 e1000_copper_link_setup_82577(struct e1000_hw *hw);
655extern s32 e1000_check_polarity_82577(struct e1000_hw *hw);
656extern s32 e1000_get_phy_info_82577(struct e1000_hw *hw);
657extern s32 e1000_phy_force_speed_duplex_82577(struct e1000_hw *hw);
658extern s32 e1000_get_cable_length_82577(struct e1000_hw *hw);
659
660extern s32 e1000_check_polarity_m88(struct e1000_hw *hw);
661extern s32 e1000_get_phy_info_ife(struct e1000_hw *hw);
662extern s32 e1000_check_polarity_ife(struct e1000_hw *hw);
663extern s32 e1000_phy_force_speed_duplex_ife(struct e1000_hw *hw);
664extern s32 e1000_check_polarity_igp(struct e1000_hw *hw);
665extern bool e1000_check_phy_82574(struct e1000_hw *hw);
666
667static inline s32 e1000_phy_hw_reset(struct e1000_hw *hw)
668{
669 return hw->phy.ops.reset(hw);
670}
671
672static inline s32 e1000_check_reset_block(struct e1000_hw *hw)
673{
674 return hw->phy.ops.check_reset_block(hw);
675}
676
677static inline s32 e1e_rphy(struct e1000_hw *hw, u32 offset, u16 *data)
678{
679 return hw->phy.ops.read_reg(hw, offset, data);
680}
681
682static inline s32 e1e_rphy_locked(struct e1000_hw *hw, u32 offset, u16 *data)
683{
684 return hw->phy.ops.read_reg_locked(hw, offset, data);
685}
686
687static inline s32 e1e_wphy(struct e1000_hw *hw, u32 offset, u16 data)
688{
689 return hw->phy.ops.write_reg(hw, offset, data);
690}
691
692static inline s32 e1e_wphy_locked(struct e1000_hw *hw, u32 offset, u16 data)
693{
694 return hw->phy.ops.write_reg_locked(hw, offset, data);
695}
696
697static inline s32 e1000_get_cable_length(struct e1000_hw *hw)
698{
699 return hw->phy.ops.get_cable_length(hw);
700}
701
702extern s32 e1000e_acquire_nvm(struct e1000_hw *hw);
703extern s32 e1000e_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
704extern s32 e1000e_update_nvm_checksum_generic(struct e1000_hw *hw);
705extern s32 e1000e_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg);
706extern s32 e1000e_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
707extern s32 e1000e_validate_nvm_checksum_generic(struct e1000_hw *hw);
708extern void e1000e_release_nvm(struct e1000_hw *hw);
709extern void e1000e_reload_nvm(struct e1000_hw *hw);
710extern s32 e1000_read_mac_addr_generic(struct e1000_hw *hw);
711
712static inline s32 e1000e_read_mac_addr(struct e1000_hw *hw)
713{
714 if (hw->mac.ops.read_mac_addr)
715 return hw->mac.ops.read_mac_addr(hw);
716
717 return e1000_read_mac_addr_generic(hw);
718}
719
720static inline s32 e1000_validate_nvm_checksum(struct e1000_hw *hw)
721{
722 return hw->nvm.ops.validate(hw);
723}
724
725static inline s32 e1000e_update_nvm_checksum(struct e1000_hw *hw)
726{
727 return hw->nvm.ops.update(hw);
728}
729
730static inline s32 e1000_read_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
731{
732 return hw->nvm.ops.read(hw, offset, words, data);
733}
734
735static inline s32 e1000_write_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
736{
737 return hw->nvm.ops.write(hw, offset, words, data);
738}
739
740static inline s32 e1000_get_phy_info(struct e1000_hw *hw)
741{
742 return hw->phy.ops.get_info(hw);
743}
744
745static inline s32 e1000e_check_mng_mode(struct e1000_hw *hw)
746{
747 return hw->mac.ops.check_mng_mode(hw);
748}
749
750extern bool e1000e_check_mng_mode_generic(struct e1000_hw *hw);
751extern bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw);
752extern s32 e1000e_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer, u16 length);
753
754static inline u32 __er32(struct e1000_hw *hw, unsigned long reg)
755{
756 return readl(hw->hw_addr + reg);
757}
758
759static inline void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val)
760{
761 writel(val, hw->hw_addr + reg);
762}
763
764#endif /* _E1000_H_ */
rtdm_lock_t
pipeline_spinlock_t rtdm_lock_t
Lock variable.
Definition driver.h:552
nanosecs_abs_t
uint64_t nanosecs_abs_t
RTDM type for representing absolute dates.
Definition rtdm.h:43